Large Language Models are subject to the laws of physics in a bad way, because they use so much electricity and make so much heat. I was interested to learn the outlines of Landauer’s principle ↗, which is in a field of physics I am not remotely able to verify. Laudauer’s principle identifies the thermodynamic cost of information erasure, and some later work builds on this to show that computation can avoid erasure through logical reversibility. Together, they suggest there is physics which may greatly reduce the amount of power required by AI datacentres. That still leaves many, many AI problems unsolved (including whether most data centres need to be built at all), but if this can be achieved then it feels highly relevant.
Logical and thermodynamic reversibility
This all starts with Landauer’s 1961 principle ↗ that the only unavoidable energy cost of computing lies in erasing information. This seems strange at first, but erasure takes a bit that could have been 0 or 1 and leaves it definitely 0, and that loss of a possible state has to be paid for in heat. Bennett’s 1973 extension ↗ showed that any computation can be restructured to perform no erasure at all, so that the inputs are recoverable from outputs at every step. Bennett called this logical reversibility, and it carries no Landauer penalty. From this we can see thermodynamic reversibility is what logical reversibility makes possible: when no information is erased, the entropy floor disappears, and the energy used to perform each computational step can be recovered and reused. If we imagine this happening for every chip in a datacentre it would make a huge difference.
The dependency runs in one direction only: thermodynamic reversibility requires logical reversibility, because an erased bit commits an irrecoverable entropy debt before the hardware gets any say. But logical reversibility can run on any old hardware and generate a lot of heat in the process.
Landauer’s limit is far below what real chips use. A single gate switch uses several orders of magnitude more energy, and in a datacentre most of the power goes on memory, interconnect, power delivery and cooling. Tiny electronic gate switches on computer chips are therefore not the best place to look for these energy savings, although that is where the startups seem to be focussing their work, perhaps because it is easier to make work.
But first it helps to understand reversibility in this context.
Logical reversibility
Janus is a reversible language ↗ developed in 1982 and formally specified in 2007 ↗. Janus makes it impossible to write a program that discards information, and provides a program inverter that runs any Janus program cleanly backwards without a history tape. The harder problem is extending this to concurrent programs, where interleaving makes reversal non-trivial.
A 2022 programming language-semantics paper on Reversing an Imperative Concurrent Programming Language ↗ from the University of Leicester demonstrates this difficult problem is solvable.
In 2025, a paper ↗ showed that transformer layer maps can be made invertible, allowing hidden states to be reconstructed during backpropagation rather than stored. This reduces activation memory, but reconstruction requires additional computation.
This differs from Bennett-style logical reversibility. The GPU operations still erase information, and floating-point reconstruction is inexact. It therefore falls short of the precondition for thermodynamically reversible computing. Its more modest significance is that information-preserving architectures may be practical at LLM scale.
Thermodynamic reversibility
Vaire Computing ↗ in London are building practical reversible hardware which preserves the energy gains that logical reversibility permits to be reclaimed, described in a 2025 industry perspective ↗. Their near-term gains come from adiabatic switching, ramping signals slowly enough that most of the charge stored in each gate is recovered, which saves much more today than anything close to Landauer’s limit. They have produced a test chip called Ice River which demonstrated net energy recovery in important circuits including an adder, which is promising but a long way from showing energy recovery for the power-clock, chip and power-delivery system. Their stated aim is to have a complete shipping product in 2027. I wish them well but I note adiabatic computing has been “close to arriving” since the early 1990s and has never yet reached production.
The Reversible Computation 2026 conference in Torino ↗ took place on 9–10 July 2026. Vaire sponsored the conference, and co-founder Hannah Earley gave an invited talk, suggesting the academic and engineering communities may be meeting in the middle. Because of my interest in reversible execution I have followed this conference for a long time.
What does it all mean?
Most of my career I have been involved in energy management issues in one way or another, and until I found this research I had not seen any compelling reason why data centres requirements won’t just keep growing without bound. The point I took away from all of this is that there may be some surprising solutions to electronic energy consumption in the near-ish future.